1. Field of the Invention
This invention is related to error correction and reporting systems.
2. Description of the Related Art
Error codes are commonly used in electronic and computing systems to detect and correct data errors, such as transmission errors or storage errors. For example, error codes may be used to detect and correct errors in data transmitted via any transmission medium (e.g. conductors and/or transmitting devices between chips in an electronic system, a network connect, a telephone line, a radio transmitter, etc.). Error codes may additionally be used to detect and correct errors associated with data stored in the memory of computer systems. One common use of error codes is to detect and correct errors of data transmitted on a data bus of a computer system. In such systems, error correction bits, or check bits, may be generated for the data prior to its transfer or storage. When the data is received or retrieved, the check bits may be used to detect and correct errors within the data.
Another source of errors in electrical systems may be so-called “soft” or “transient errors”. Transient memory errors may be caused by the occurrence of an event, rather than a defect in the memory circuitry itself. Transient memory errors may occur due to, for example, random alpha particles striking the memory circuit. Transient communication errors may occur due to noise on the data paths, inaccurate sampling of the data due to clock drift, etc. On the other hand, “hard” or “persistent” errors may occur due to component failure.
Generally, various error detection code (EDC) and error correction code (ECC) schemes are used to detect and correct memory and/or communication errors. For example, parity may be used. With parity, a single parity bit is stored/transmitted for a given set of data bits, representing whether the number of binary ones in the data bits is even or odd. The parity is generated when the set of data bits is stored/transmitted and is checked when the set of data bits is accessed/received. If the parity doesn't match the accessed set of data bits, then an error is detected.
Other EDC/ECC schemes assign multiple check bits per set of data bits. The encodings are selected such that a bit error or errors may be detected, and in some cases the encodings may be selected such that the bit or bits in error may be identifiable so that the error can be corrected (depending on the number of bits in error and the ECC scheme being used). Typically, as the number of bit errors that can be detected and/or corrected increases, the number of check bits used in the scheme increases as well.
In some cases, a data error may be detected which cannot be corrected. In such cases, the uncorrectable error is generally reported. In response to the reported error, an error handling routine may be initiated. If the error is serious, a shutdown of the system may be required. Subsequently, a review may be conducted in order to determine the cause of the error. In some cases, an uncorrectable error may be propagated in such a way that it is reported multiple time by multiple components.
For example, a memory controller may fetch data which is to be stored in an L2 cache. The memory controller may detect an uncorrectable error in the fetched data, report the error, and store the data in the L2. Subsequently, the CPU may read the data, detect the error, and report the error. These multiple error reports may only serve to obscure the root cause of the problem.
In view of the above, an effective method and mechanism for handling and reporting data errors is desired.